F68HC11 V3.5 MEMORY MAP DECHEXNAMEVALUE/DESCRIPTION 0$0000W0: Word Pointer 1$0001 " 2 $0002 IP0: Instruction Pointer 3 $0003 " 4 $0004 UP$0006: UAREA 5 $0005 " 6 $0006 DNLINKLinked List of Tasks 7 $0007 " 8 $0008 UPLINKLinked List of Tasks 9 $0009 " 10 $000A PRIORITYPriority Level of Task 11 $000B " 12 $000C RPSAVEProgram Counter 13 $000D "Location 6 thru D are reserved for multitasking. Whey they are not used, they can be used as variable locations. 14 $000E R0STACKINIT: Base Address of Return Stack 15 $000F " 16 $0010 S0BOS: Base Address of Data Stack R0 and S0 can be modified to point into external RAM if larger stack areas are desired. They will not be put into effect until ABORT is executed. 17 $0011 " 18 $0012 KEY-BC-PTRDEFKEY: Address of Control Blocks that determine how the built-in input routines work. 19 $0013 " 20 $0014 EMIT-BC-PTRDEFOUT: Address of Control Blocks that determine how the built-in output routines work. 21 $0015 " 22 $0016 UKEYKEYSUB+2: Address of Input Subroutines 23 $0017 " 24 $0018 UEMITEMITSUB+2: Address of Output Subroutines 25 $0019 " 26 $001A U?TERMINALQTSUB+2: Address of ?TERMINAL Subroutines 27 $001B " 28 $001C TIBTIBX: Starting Address of Terminal Input Buffer 29 $001D " 30 $001E UC/L16: Length of TIB 31 $001F " 32 $0020 CLD/WRM$A55A: As long as this contains a $A55A pattern and there is no in the serial channel, the system will not do a cold download of system variables at every reset. 33 $0021 " 34 $0022 UPADUPADINIT: Base Address of Scratch Pad used for output number conversion 35 $0023 " 36 $0024 BASE10: Current Number Base 37 $0025 " 38 $0026 C/10MS20000: Cycles per 10 Milliseconds delay 39 $0027 " 40 $0028 CR CHARACTER$0D: ASCII value of CR 41 $0029 " 42 $002A BS CHARACTER$08: ASCII value of BS 43 $002B " 44 $002C DPTOP: Dictionary Pointer 45 $002D " 46 $002E DP\0: Head Dictionary Pointer 47 $002F " 48 $0030 EDP$B604: EEPROM Dictionary Usage Pointer that is used to when a word is moved into EEPROM with EEWORD 49 $0031 " 50 $0032 HEADERLESS0: Flag that controls headerless code generation 51 $0033 " 52 $0034 VOC-LINKUAREA+UASMOF+2 53 $0035 " 54 $0036 $81$81: Fake head mode of count 1 with MSB set to 1 55 $0037 $A0$A0: Blank(=$20) with MSB set to 1 56 $0038 UFORTHNTOP: Name Field Address of top word 57 $0039 " 58 $003A 000000 59 $003B 00 60 $003C $81$81 61 $003D $A0$A0 62 $003E UEDITOREDTOP: Reserved for future use of EDITOR 63 $003F " 64 $0040 "UAREA+U4TH+2 65 $0041 " 66 $0042 $81$81 67 $0043 $A0$A0 68 $0044 UASSEMBLERASMTOP: Reserved for future use of ASSEMBLER 69 $0045 " 70 $0046 "UAREA+UEDITOR+2 71 $0047 " 72 $0048 WIDTH31: Maximum length of word 73 $0049 " 74 $004A FENCENTOP: Lower limit restricting FORGET 75 $004B " 76 $004C UABORTABORT: Error handling vector 77 $004D " 78 $004E UFIRST$C7FC: The address of first block buffer 79 $004F " 80 $0050 ULIMIT$D000: End of block buffer 81 $0051 " 82 $0052 OFFSET0: The offset added to the block number on the stack by BLOCK or BUFFER to determine the actual physical block number 83 $0053 " 84 $0054 WARNING0: Shows how error is handled. 85 $0055 " 86 $0056 UR/WRAM DISK: Default location 87 $0057 " 88 $0058 >IN# of bytes from the beginning of the input stream at any particular moment during interpretation 89 $0059 " 90 $005A SPANThe count of characters received and stored by the most recent execution of EXPECT 91 $005B " 92 $005C #TIBThe number of characters input #TIB is accessed by WORD when BLK is 0 93 $005D " 94 $005E DPLThe number of places after the fractional point for input conversion 95 $005F " 96 $0060 FLDThe value of the field length reserved for a number during output conversion 97 $0061 " 98 $0062 USEThe address of block buffer currently using 99 $0063 " 100 $0064 PREVThe address of block buffer previously used 101 $0065 " 102 $0066 BLKThe number of block that is currently being interpreted 103 $0067 " 104 $0068 SCRThe number of block most recently listed 105 $0069 " 106 $006A CONTEXTThe vocabulary to be searched first in the dictionary 107 $006B " 108 $006C CURRENTThe vocabulary into which new word definitions will be entered 109$006D " 110 $006E STATEThe value defining the compilation state 111 $006F " 112 $0070 CSPTemporary location for the Check Stack Pointer(CSP) position for compilation error checking 113 $0071 " 114 $0072 CYLINDERBase Address of the Ram Disk 115 $0073 " 116 $0074FSPFloating-point Stack Pointer 117 $0075 " 118 $0076 FSP0(DISKNO)158: Base Address of Floating-point Stack 119 $0077 " 120 $0078 PLACES(B/SIDE)Number of digits to the right of the radix point displayed by E. or F. 121 $0079 " TOSEND USER VARIABLES 122 $007A(digits) 123$007B(digits) 124 $007C (digits) 125 $007D (digits) 126 $007E (digits) 127 $007F (digits) 128 $0080 (digits) 129 $0081 (digits) 130 $0082 (digits) 131 $0083 (digits) 132 $0084 (digits) 133 $0085 (digits) 134 $0086 (digits) 135 $0087 (digits)PAD DOWN FOR 14 CHAR 136 $0088 (characters)TIBX UPADINIT 137 $0089 (characters) 138 $008A(characters) 139 $008B(characters) 140 $008C(characters) 141 $008D(etc.) 142 $008E 143 $008F 144 $0090 145 $0091 146 $0092 147 $0093 148 $0094 149 $0095 150 $0096 151 $0097 152 $0098 153 $0099 154 $009A 155 $009B 156 $009C 157 $009D 158 $009E 159 $009F 160 $00A0 161 $00A1 162 $00A2 163 $00A3 164 $00A4 165 $00A5 166 $00A6 167 $00A7 168 $00A8 169 $00A9 170 $00AA 171 $00AB(characters)TIB continues 172 $00AC 173 $00AD 174 $00AE 175 $00AF 176 $00B0 177 $00B1 178 $00B2 179 $00B3 180 $00B4 181 $00B5 182 $00B6 183 $00B7 184 $00B8 185 $00B9 186 $00BA 187 $00BB 188 $00BC 189$00BD 190$00BE 191$00BF 192$00C0 193$00C1 194$00C2 195$00C3 196$00C4 197$00C5 198$00C6 199$00C7 200$00C8 201$00C9 202$00CA 203$00CB 204$00CC 205$00CD 206 $00CE 207 $00CF 208 $00D0 209 $00D1 211 $00D3 212 $00D4 213 $00D5 214 $00D6 215 $00D7TIB ends 216 $00D8RETURN STACK 20 217 $00D9 " 218 $00DARETURN STACK 19 219 $00DB " 220 $00DCRETURN STACK 18 221 $00DD " 222 $00DERETURN STACK 17 223 $00DF " 224 $00E0RETURN STACK 16 225 $00E1 " 226 $00E2RETURN STACK 15 227 $00E3 " 228 $00E4 RETURN STACK 14 229 $00E5 " 230 $00E6 RETURN STACK 13 231 $00E7 " 232 $00E8 RETURN STACK 12 233 $00E9 " 234 $00EA RETURN STACK 11 235 $00EB " 236 $00EC RETURN STACK 10 237 $00ED " 238 $00EE RETURN STACK 9 239 $00EF " 240 $00F0 RETURN STACK 8 241 $00F1 " 242 $00F2 RETURN STACK 7 243 $00F3 " 244 $00F4 RETURN STACK 6 245 $00F5 " 246 $00F6 RETURN STACK 5 247 $00F7 " 248 $00F8 RETURN STACK 4 249 $00F9 " 250 $00FA RETURN STACK 3 251 $00FB " 252 $00FC RETURN STACK 2 253 $00FD " 254 $00FE RETURN STACK 1 255 $00FF " R0 PUT IN S 256 $0100 DATA STACK 20 257 $0101" 258 $0102 DATA STACK 19 259 $0103 " 260 $0104 DATA STACK 18 261 $0105 " 262 $0106 DATA STACK 17 263 $0107 " 264 $0108 DATA STACK 16 265 $0109 " 266 $010A DATA STACK 15 267 $010B " 268 $010C DATA STACK 14 269 $010D " 270 $010E DATA STACK 13 271 $010F " 272 $0110 DATA STACK 12 273 $0111 " 274 $0112 DATA STACK 11 275 $0113 " 276 $0114 DATA STACK 10 277$0115 " 278$0116 DATA STACK 9 279$0117 " 280 $0118 DATA STACK 8 281$0119 " 282$011A DATA STACK 7 283$011B " 284$011C DATA STACK 6 285$011D " 286$011E DATA STACK 5 287$011F " 288$0120DATA STACK 4 289$0121" 290$0122DATA STACK 3 291$0123" 292$0124DATA STACK 2 293$0125" 294$0126DATA STACK 1 295$0127" 296$0128F.P.STACK 8S0 IN Y 297$0129" 298$012A 299$012B 300$012C 301$012D 302$012EF.P.STACK 7 303$012F 304$0130 305$0131 306$0132 307$0133 308$0134F.P.STACK 6 309$0135 310$0136 311$0137 312$0138 313$0139 314$013AF.P.STACK 5 315$013B 316$013C 317$013D 318$013E 319$013F 320$0140F.P.STACK 4 321$0141 322$0142 323$0143 324$0144 325$0145 326$0146F. P. STACK 3 327$0147 328$0148 329$0149 330$014A 331$014B 332$014CF. P. STACK 2 333$014D 334$014E 335$014F 336$0150 337$0151 338$0152F. P. STACK 1 339$0153 340$0154 341$0155 342$0156 343$0157 344$0158NTOP$84 345$0159'T' 346$015A'A' 347$015B'S' 348$015C'K+80' 349$015DLINK 350$015E " 351$015FPFAPTR 352$0160 " 353$0161(dictionary)TOP 354$0162 " 355$0163 " 356$0164 " 511$01FFEND OF INTERNAL RAM $103DINIT REG $0B REV 2-3 ($09 REV 0-1) BY RESET $B000PORTAPort A Data Register $B001Reserved etc. $B002PIOCParallel I/O Control Register $B003PORTCPort C Data Register $B004PORTBPort B Data Register $B005PORTCLPort C Latched Data Register $B006Reserved $B007DDRCData Direction Register for Port C $B008PORTDPort D Data Register $B009DDRDData Direction Register for Port D $B00APORTEPort E Data Register $B00BCFORCTimer Compare Force Register $B00COC1MOutput Compare 1 Mask Register $B00DOC1DOutput Compare 1 Data Register $B00ETCNTTimer Counter Register $B00F" $B010TIC1Timer Input Capture Register 1 $B011" $B012TIC2Timer Input Capture Register 2 $B013" $B014TIC3Timer Input Capture Register 3 $B015" $B016TOC1Timer Output Compare Register 1 $B017" $B018TOC2Timer Output Compare Register 2 $B019" $B01ATOC3Timer Output Compare Register 3 $B01B" $B01CTOC4Timer Output Compare Register 4 $B01D" $B01ETI4O5Timer Input Capture 4 or Output Compare 5 Register $B01F" $B020TCTL1Timer Control Register 1 $B021TCTL2Timer Control Register 2 $B022TMSK1Main Timer Interrupt Mask Reg.1 $B023TFLG1Main Timer Interrupt Flag Reg.1 $B024TMSK2Misc. Timer Interrupt Mask Reg.2 $B025TFLG2Misc. Timer Interrupt Flag Reg.2 $B026PACTLPulse Accumulator Control Register $B027PACNTPulse Accumulator Count Register $B028SPCRSPI Control Register $B029SPSRSPI Status Register $B02ASPDRSPI Data Register $B02BBAUDSCI Baud Rate Control Register $30 BY RESET $B02CSCCR1SCI Control Register $00 BY RESET $B02DSCCR2SCI Control Register 2 $0C BY RESET $B02ESCSRSCI Status Register $B02FSCDRSCI Data Register $B030ADCTLA/D Control/Status Register $B031ADR1A/D Result Register 1 $B032ADR2A/D Result Register 2 $B033ADR3A/D Result Register 3 $B034ADR4A/D Result Register 4 $B035BPROTBlock Protect Register $B036Reserved $B037Reserved $B038Reserved $B039OPTIONSystem Configuration Options $B03ACOPRSTArm/Reset COP Timer Circuitry $B03BPPROGEEPROM Programming Register $B03CHPRIOHighest Priority Interrupt & Misc. $B03DINITRAM and I/O Mapping register $0B BY RESET $B03ETEST1Factory Test Register $B03FCONFIGConfiguration Control register $B600EEPROM AUTOSTART LOC HI-LEVEL IN EEPROM $B601" " $B602" CFA OF WORD FOR HI-LEVEL AUTOSTART $B603" " " " " unassigned " " $B7BF" SCI SER SYS INT VEC AT $FFD6 POINTS HERE " " $B7C2" SPI SERIAL $FFD8 " " $B7C5" PLS ACC OVRFL $FFDA " " $B7C8" PLS ACC EDGE $FFDC " " $B7CB" TMR OVERFLOW $FFDE " " $B7CE" TMR OUT CAP 5 $FFE0 " " $B7D1" TMR OUT CAP 4 $FFE2 " " $B7D4" TMR OUT CAP 3 $FFE4 " " $B7D7" TMR OUT CAP 2 $FFE6 " " $B7DA" TMR OUT CAP 1 $FFE8 " " $B7DD" TMR IN CAP 3 $FFEA " " $B7E0" TMR IN CAP 2 $FFEC " " $B7E3" TMR IN CAP 1 $FFEE " " $B7E6" REAL TIME $FFF0 " " $B7E9" IRQ $FFF2 " " $B7EC" XIRQ $FFF4 " " $B7EF" SWI $FFF6 " " $B7F2" OP-CODE TRAP $FFF8 " " $B7F5" COP FAILURE $FFFA " " $B7F8" COP Clk Mon $FFFC " " $B7FB" ENTRY POINT FOR RESET SUB $B7FC" " $B7FD" " $B7FE" AUTOSTART LOC FOR RESET SUBROUTINE BEFORE $B7FFEEPROM REG INITIALIZATION FOR 64 CLK CYC REG $D000FLOATING POINT ROM "ADDTIONAL HEADS $E000ROM AND HEADS " " " " " $XXXXNON RUN TIME CODES " " " " " $XXXXRUN TIME CODES " " " " " $XXX0DEFKEY SCSR IN ROM ADDRESS OF STATUS REG. $XXX1 $XXX2DEFKEY+2 $20 IN ROM AND MASK $XXX3DEFKEY+3 0 IN ROM XOR MASK $XXX4DEFKEY+4 SCDR IN ROM ADDRESS OF INPUT REG. $XXX5 $XXX6DEFOUT SCSR IN ROM ADDRESS OF STATUS REG $XXX7 $XXX8DEFOUT+2 $80 IN ROM AND MASK $XXX9DEFOUT+3 0 IN ROM XOR MASK $XXXADEFOUT+4 SCDR IN ROM ADDRESS OF OUTPUT REGISTER $XXXB " $FFC0RESERVED $FFC1" $FFC2RESERVED $FFC3" $FFC4RESERVED $FFC5" $FFC6RESERVED $FFC7" $FFC8RESERVED $FFC9" $FFCARESERVED $FFCB" $FFCCRESERVED $FFCD" $FFCERESERVED $FFCF" $FFD0RESERVED $FFD1" $FFD2RESERVED $FFD3" $FFD4RESERVED $FFD5" $FFD6SCI SER SYS $B7BF IN ROM $FFD7" $FFD8SPI SERIAL $B7C2 IN ROM $FFD9" $FFDAPLS ACC OVRFL $B7C5 IN ROM $FFDB" $FFDCPLS ACC EDGE $B7C8 IN ROM $FFDD" $FFDETMR OVERFLOW $B7CB IN ROM $FFDF" $FFE0TMR OUT CAP 5 $B7CE IN ROM $FFE1" $FFE2TMR OUT CAP 4 $B7D1 IN ROM $FFE3" $FFE4TMR OUT CAP 3 $B7D4 IN ROM $FFE5" $FFE6TMR OUT CAP 2 $B7D7 IN ROM $FFE7" $FFE8TMR OUT CAP 1 $B7DA IN ROM $FFE9" $FFEATMR IN CAP 3 $B7DD IN ROM $FFEB" $FFECTMR IN CAP 2 $B7E0 IN ROM $FFED" $FFEETMR IN CAP 1 $B7E3 IN ROM $FFEF" $FFF0REAL TIME $B7E6 IN ROM $FFF1" $FFF2IRQ $B7E9 IN ROM $FFF3" $FFF4XIRQ $B7EC IN ROM $FFF5" $FFF6SWI $B7EF IN ROM $FFF7" $FFF8OP-CODE TRAP $B7F2 IN ROM $FFF9" $FFFACOP FAILURE $B7F5 IN ROM $FFFB" $FFFCCOP Clk Mon $B7F8 IN ROM $FFFD" $FFFERESET COLD+2 IN ROM $FFFF"