ADDENDUM TO NMI APPLICATIONS

          DATE: 12/05/1992

          SUBJECT: APPLICATION NOTE CHANGES REQUIRED FOR THE PROPER
                     OPERATION OF THE NMI F68HC11FN VERSION 3.5 CPU.

          Most MAX-FORTH and User manual application notes published by New
          Micros contain the following example:

               HEX            ( SELECT HEX NUMBER MODE )
               100 TIB !      ( MOVE INPUT BUFFER TO ADDRESS 100 HEX )
               50 TIB 2+ !    ( SET DEPTH OF INPUT BUFFER TO 50 HEX )

          The F68HC11FN VERSION 3.5 does not require the TIB movement state-
          ments.  The VER. 3.5 input buffer has been expanded internally to
          80 characters (50 Hex) in depth.

          CAUTION: If the TIB move statements listed above will cause a mal-
          function of the VER. 3.5 input operation.
               The VER.  3.5 MAX FORTH uses all 512 Bytes of  internal  ram
          available on this CPU.  Any pointer or data movement should begin
          at an address of 200 Hex or greater for proper operation.

          Corrected TIB move statement for VER. 3.5:

               HEX            ( SELECT HEX NUMBER MODE )
               200 TIB !      ( MOVE INPUT BUFFER TO ADDRESS 200 HEX )
               50 TIB 2+ !    ( SET DEPTH OF INPUT BUFFER TO 50 HEX )
          (Note that this move is not necessary).
 
          DIFFERENCES ON F68HC11 V3.3 AND F68HC11 V3.5: 

          ***  In the MAX-FORTH USER MANUAL, On page 1 of the PROGRAMMING
          THE INPUT/OUTPUT OF THE F68HC11 (MAX-FORTH REFERENCE MANUAL 
          ADDENDUM); or on diskette, page 1 of the  PROGTIO.TXT (zipped
          under the UMMAX <DIR>); Port-A bit 3 is configured for output
          only (This applied for F68HC11 V3.3 ONLY!). 
           BIT 7   6     5     4     3     2     1     0
          +-----+-----+-----+-----+-----+-----+-----+-----+
          |DDRA7| PAEN|PAMOD|PEDGE|  -  |  -  | RTR1| RTR0|   $B026 PATCL
          +-----+-----+-----+-----+-----+-----+-----+-----+
 
          For F68HC11 V3.5, Port-A bit 3 (PA3) and bit 7 (PA7) can be 
          configured as the general-purpose I/O using the DDRA3 (for PA3)
          and DDRA7 (for PA7) bits in the PACTL register.
           BIT 7   6     5     4     3     2     1     0
          +-----+-----+-----+-----+-----+-----+-----+-----+
          |DDRA7| PAEN|PAMOD|PEDGE|DDRA3|I4/O5| RTR1| RTR0|   $B026 PATCL
          +-----+-----+-----+-----+-----+-----+-----+-----+

          *** Internal ROM for F68HC11 V3.3 is 8K, located from E000-FFFF.
          For F68HC11 V3.5, the internal ROM is 12K, located from D000-FFFF.  
           

          THANKS FOR BEING A NMI CUSTOMER!



















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