F68HC11 V3.5 MEMORY MAP HEX NAME VALUE/DESCRIPTION ~~~ ~~~~ ~~~~~~~~~~~~~~~~~ $0000 W 0: Word Pointer $0001 " $0002 I P0: Instruction Pointer $0003 " $0004 UP $0006: UAREA $0005 " $0006 DNLINK Linked List of Tasks $0007 " $0008 UPLINK Linked List of Tasks $0009 " $000A PRIORITY Priority Level of Task $000B " $000C RPSAVE Program Counter $000D " Location 6 thru D are reserved for multitasking. WheN they are not used, they can be used as variable locations. $000E R0 STACKINIT: Base Address of Return Stack $000F " $0010 S0 BOS: Base Address of Data Stack R0 and S0 can be modified to point into external RAM if larger stack areas are desired. They will not be put into effect until ABORT is executed. $0011 " $0012 KEY-BC-PTR DEFKEY: Address of Control Blocks that determine how the built-in input routines work. $0013 " $0014 EMIT-BC-PTR DEFOUT: Address of Control Blocks that determine how the built-in output routines work. $0015 " $0016 UKEY KEYSUB+2: Address of Input Subroutines $0017 " $0018 UEMIT EMITSUB+2: Address of Output Subroutines $0019 " $001A U?TERMINAL QTSUB+2: Address of ?TERMINAL Subroutines $001B " $001C TIB TIBX: Starting Address of Terminal Input Buffer $001D " $001E UC/L 16: Length of TIB $001F " $0020 CLD/WRM $A55A: As long as this contains a $A55A pattern and there is no in the serial channel, the system will not do a cold download of system variables at every reset. $0021 " $0022 UPAD UPADINIT: Base Address of Scratch Pad used for output number conversion $0023 " $0024 BASE 10: Current Number Base $0025 " $0026 C/10MS 20000: Cycles per 10 Milliseconds delay $0027 " $0028 CR CHARACTER $0D: ASCII value of CR $0029 " $002A BS CHARACTER $08: ASCII value of BS $002B " $002C DP TOP: Dictionary Pointer $002D " $002E DP\ 0: Head Dictionary Pointer $002F " $0030 EDP $B604: EEPROM Dictionary Usage Pointer that is used to when a word is moved into EEPROM with EEWORD $0031 " $0032 HEADERLESS 0: Flag that controls headerless code generation $0033 " $0034 VOC-LINK UAREA+UASMOF+2 $0035 " $0036 $81 $81: Fake head mode of count 1 with MSB set to 1 $0037 $A0 $A0: Blank(=$20) with MSB set to 1 $0038 UFORTH NTOP: Name Field Address of top word $0039 " $003A 00 0000 $003B 00 $003C $81 $81 $003D $A0 $A0 $003E UEDITOR EDTOP: Reserved for future use of EDITOR $003F " $0040 UAREA+U4TH+2 $0041 " $0042 $81 $81 $0043 $A0 $A0 $0044 UASSEMBLER ASMTOP: Reserved for future use of ASSEMBLER $0045 " $0046 " UAREA+UEDITOR+2 $0047 " $0048 WIDTH 31: Maximum length of word $0049 " $004A FENCE NTOP: Lower limit restricting FORGET $004B " $004C UABORT ABORT: Error handling vector $004D " $004E UFIRST $C7FC: The address of first block buffer $004F " $0050 ULIMIT $D000: End of block buffer $0051 " $0052 OFFSET 0: The offset added to the block number on the stack by BLOCK or BUFFER to determine the actual physical block number $0053 " $0054 WARNING 0: Shows how error is handled. $0055 " $0056 UR/W RAM DISK: Default location $0057 " $0058 >IN # of bytes from the beginning of the input stream at any particular moment during interpretation $0059 " $005A SPAN The count of characters received and stored by the most recent execution of EXPECT $005B " $005C #TIB The number of characters input #TIB is accessed by WORD when BLK is 0 $005D " $005E DPL The number of places after the fractional point for input conversion $005F " $0060 FLD The value of the field length reserved for a number during output conversion $0061 " $0062 USE The address of block buffer currently using $0063 " $0064 PREV The address of block buffer previously used $0065 " $0066 BLK The number of block that is currently being interpreted $0067 " $0068 SCR The number of block most recently listed $0069 " $006A CONTEXT The vocabulary to be searched first in the dictionary $006B " $006C CURRENT The vocabulary into which new word definitions will be entered $006D " $006E STATE The value defining the compilation state $006F " $0070 CSP Temporary location for the Check Stack Pointer(CSP) position for compilation error checking $0071 " $0072 CYLINDER Base Address of the Ram Disk $0073 " $0074 FSP Floating-point Stack Pointer $0075 " $0076 FSP0 (DISKNO)158: Base Address of Floating-point Stack $0077 " $0078 PLACES (B/SIDE) Number of digits to the right of the radix point displayed by E. or F. $0079 TOS END USER VARIABLES $007A (digits) $007B (digits) $007C (digits) $007D (digits) $007E (digits) $007F (digits) $0080 (digits) $0081 (digits) $0082 (digits) $0083 (digits) $0084 (digits) $0085 (digits) $0086 (digits) $0087 (digits) PAD DOWN FOR 14 CHAR $0088 (characters) TIBX UPADINIT $0089 (characters) $008A (characters) $008B (characters) $008C (characters) $008D (etc.) $008E $008F $0090 $0091 $0092 $0093 $0094 $0095 $0096 $0097 $0098 $0099 $009A $009B $009C $009D $009E $009F $00A0 $00A1 $00A2 $00A3 $00A4 $00A5 $00A6 $00A7 $00A8 $00A9 $00AA $00AB (characters) TIB continues $00AC $00AD $00AE $00AF $00B0 $00B1 $00B2 $00B3 $00B4 $00B5 $00B6 $00B7 $00B8 $00B9 $00BA $00BB $00BC $00BD $00BE $00BF $00C0 $00C1 $00C2 $00C3 $00C4 $00C5 $00C6 $00C7 $00C8 $00C9 $00CA $00CB $00CC $00CD $00CE $00CF $00D0 $00D1 $00D3 $00D4 $00D5 $00D6 $00D7 TIB ends $00D8 RETURN STACK 20 $00D9 " $00DA RETURN STACK 19 $00DB " $00DC RETURN STACK 18 $00DD " $00DE RETURN STACK 17 $00DF " $00E0 RETURN STACK 16 $00E1 " $00E2 RETURN STACK 15 $00E3 " $00E4 RETURN STACK 14 $00E5 " $00E6 RETURN STACK 13 $00E7 " $00E8 RETURN STACK 12 $00E9 " $00EA RETURN STACK 11 $00EB " $00EC RETURN STACK 10 $00ED " $00EE RETURN STACK 9 $00EF " $00F0 RETURN STACK 8 $00F1 " $00F2 RETURN STACK 7 $00F3 " $00F4 RETURN STACK 6 $00F5 " $00F6 RETURN STACK 5 $00F7 " $00F8 RETURN STACK 4 $00F9 " $00FA RETURN STACK 3 $00FB " $00FC RETURN STACK 2 $00FD " $00FE RETURN STACK 1 $00FF R0 PUT IN S $0100 DATA STACK 20 $0101 " $0102 DATA STACK 19 $0103 " $0104 DATA STACK 18 $0105 " $0106 DATA STACK 17 $0107 " $0108 DATA STACK 16 $0109 " $010A DATA STACK 15 $010B " $010C DATA STACK 14 $010D " $010E DATA STACK 13 $010F " $0110 DATA STACK 12 $0111 " $0112 DATA STACK 11 $0113 " $0114 DATA STACK 10 $0115 " $0116 DATA STACK 9 $0117 " $0118 DATA STACK 8 $0119 " $011A DATA STACK 7 $011B " $011C DATA STACK 6 $011D " $011E DATA STACK 5 $011F " $0120 DATA STACK 4 $0121 " $0122 DATA STACK 3 $0123 " $0124 DATA STACK 2 $0125 " $0126 DATA STACK 1 $0127 " $0128 F.P.STACK 8S0 IN Y $0129 " $012A $012B $012C $012D $012E F.P.STACK 7 $012F $0130 $0131 $0132 $0133 $0134 F.P.STACK 6 $0135 $0136 $0137 $0138 $0139 $013A F.P.STACK 5 $013B $013C $013D $013E $013F $0140 F.P.STACK 4 $0141 $0142 $0143 $0144 $0145 $0146 F. P. STACK 3 $0147 $0148 $0149 $014A $014B $014C F. P. STACK 2 $014D $014E $014F $0150 $0151 $0152 F. P. STACK 1 $0153 $0154 $0155 $0156 $0157 $0158 NTOP $84 $0159 'T' $015A 'A' $015B 'S' $015C 'K+80' $015D LINK $015E " $015F PFAPTR $0160 " $0161 (dictionary)TOP $0162 " $0163 " $0164 " $01FF END OF INTERNAL RAM $103D INIT REG $0B REV 2-3 ($09 REV 0-1) BY RESET $B000 PORTA Port A Data Register $B001 Reserved etc. $B002 PIOC Parallel I/O Control Register $B003 PORTC Port C Data Register $B004 PORTB Port B Data Register $B005 PORTCL Port C Latched Data Register $B006 Reserved $B007 DDRC Data Direction Register for Port C $B008 PORTD Port D Data Register $B009 DDRD Data Direction Register for Port D $B00A PORTE Port E Data Register $B00B CFORC Timer Compare Force Register $B00C OC1M Output Compare 1 Mask Register $B00D OC1D Output Compare 1 Data Register $B00E TCNT Timer Counter Register $B00F " $B010 TIC1 Timer Input Capture Register 1 $B011 " $B012 TIC2 Timer Input Capture Register 2 $B013 " $B014 TIC3 Timer Input Capture Register 3 $B015 " $B016 TOC1 Timer Output Compare Register 1 $B017 " $B018 TOC2 Timer Output Compare Register 2 $B019 " $B01A TOC3 Timer Output Compare Register 3 $B01B " $B01C TOC4 Timer Output Compare Register 4 $B01D " $B01E TI4O5 Timer Input Capture 4 or Output Compare 5 Register $B01F " $B020 TCTL1 Timer Control Register 1 $B021 TCTL2 Timer Control Register 2 $B022 TMSK1 Main Timer Interrupt Mask Reg.1 $B023 TFLG1 Main Timer Interrupt Flag Reg.1 $B024 TMSK2 Misc. Timer Interrupt Mask Reg.2 $B025 TFLG2 Misc. Timer Interrupt Flag Reg.2 $B026 PACTL Pulse Accumulator Control Register $B027 PACNT Pulse Accumulator Count Register $B028 SPCR SPI Control Register $B029 SPSR SPI Status Register $B02A SPDR SPI Data Register $B02B BAUD SCI Baud Rate Control Register $30 BY RESET $B02C SCCR1 SCI Control Register $00 BY RESET $B02D SCCR2 SCI Control Register 2 $0C BY RESET $B02E SCSR SCI Status Register $B02F SCDR SCI Data Register $B030 ADCTL A/D Control/Status Register $B031 ADR1 A/D Result Register 1 $B032 ADR2 A/D Result Register 2 $B033 ADR3 A/D Result Register 3 $B034 ADR4 A/D Result Register 4 $B035 BPROT Block Protect Register $B036 Reserved $B037 Reserved $B038 Reserved $B039 OPTION System Configuration Options $B03A COPRST Arm/Reset COP Timer Circuitry $B03B PPROG EEPROM Programming Register $B03C HPRIO Highest Priority Interrupt & Misc. $B03D INITRAM and I/O Mapping register $0B BY RESET $B03E TEST1 Factory Test Register $B03F CONFIG Configuration Control register " " $B600 EEPROM AUTOSTART LOC HI-LEVEL IN EEPROM $B601 " " $B602 " CFA OF WORD FOR HI-LEVEL AUTOSTART $B603 " " " " " unassigned " " $B7BF SCI SER SYS INT VEC AT $FFD6 POINTS HERE " " $B7C2 SPI SERIAL $FFD8 " " $B7C5 PLS ACC OVRFL $FFDA " " $B7C8 PLS ACC EDGE $FFDC " " $B7CB TMR OVERFLOW $FFDE " " $B7CE TMR OUT CAP 5 $FFE0 " " $B7D1 TMR OUT CAP 4 $FFE2 " " $B7D4 TMR OUT CAP 3 $FFE4 " " $B7D7 TMR OUT CAP 2 $FFE6 " " $B7DA TMR OUT CAP 1 $FFE8 " " $B7DD TMR IN CAP 3 $FFEA " " $B7E0 TMR IN CAP 2 $FFEC " " $B7E3 TMR IN CAP 1 $FFEE " " $B7E6 REAL TIME $FFF0 " " $B7E9 IRQ $FFF2 " " $B7EC XIRQ $FFF4 " " $B7EF SWI $FFF6 " " $B7F2 OP-CODE TRAP $FFF8 " " $B7F5 COP FAILURE $FFFA " " $B7F8 COP Clk Mon $FFFC " " $B7FB ENTRY POINT FOR RESET SUB $B7FC " $B7FD " $B7FE AUTOSTART LOC FOR RESET SUBROUTINE BEFORE $B7FF EEPROM REG INITIALIZATION FOR 64 CLK CYC REG $D000 FLOATING POINT ROM " ADDTIONAL HEADS $E000 ROM AND HEADS " " " " " $XXXX NON RUN TIME CODES " " " " " $XXXX RUN TIME CODES " " " " " $XXX0 DEFKEY SCSR IN ROM ADDRESS OF STATUS REG. $XXX1 " $XXX2 DEFKEY+2 $20 IN ROM AND MASK $XXX3 DEFKEY+3 0 IN ROM XOR MASK $XXX4 DEFKEY+4 SCDR IN ROM ADDRESS OF INPUT REG. $XXX5 " $XXX6 DEFOUT SCSR IN ROM ADDRESS OF STATUS REG $XXX7 " $XXX8 DEFOUT+2 $80 IN ROM AND MASK $XXX9 DEFOUT+3 0 IN ROM XOR MASK $XXXA DEFOUT+4 SCDR IN ROM ADDRESS OF OUTPUT REGISTER $XXXB " $FFC0 RESERVED $FFC1 " $FFC2 RESERVED $FFC3 " $FFC4 RESERVED $FFC5 " $FFC6 RESERVED $FFC7 " $FFC8 RESERVED $FFC9 " $FFCA RESERVED $FFCB " $FFCC RESERVED $FFCD " $FFCE RESERVED $FFCF " $FFD0 RESERVED $FFD1 " $FFD2 RESERVED $FFD3 " $FFD4 RESERVED $FFD5 " $FFD6 SCI SER SYS $B7BF IN ROM $FFD7 " $FFD8 SPI SERIAL $B7C2 IN ROM $FFD9 " $FFDA PLS ACC OVRFL $B7C5 IN ROM $FFDB " $FFDC PLS ACC EDGE $B7C8 IN ROM $FFDD " $FFDE TMR OVERFLOW $B7CB IN ROM $FFDF " $FFE0 TMR OUT CAP 5 $B7CE IN ROM $FFE1 " $FFE2 TMR OUT CAP 4 $B7D1 IN ROM $FFE3 " $FFE4 TMR OUT CAP 3 $B7D4 IN ROM $FFE5 " $FFE6 TMR OUT CAP 2 $B7D7 IN ROM $FFE7 " $FFE8 TMR OUT CAP 1 $B7DA IN ROM $FFE9 " $FFEA TMR IN CAP 3 $B7DD IN ROM $FFEB " $FFEC TMR IN CAP 2 $B7E0 IN ROM $FFED " $FFEE TMR IN CAP 1 $B7E3 IN ROM $FFEF " $FFF0 REAL TIME $B7E6 IN ROM $FFF1 " $FFF2 IRQ $B7E9 IN ROM $FFF3 " $FFF4 XIRQ $B7EC IN ROM $FFF5 " $FFF6 SWI $B7EF IN ROM $FFF7 " $FFF8 OP-CODE TRAP $B7F2 IN ROM $FFF9 " $FFFA COP FAILURE $B7F5 IN ROM $FFFB " $FFFC COP Clk Mon $B7F8 IN ROM $FFFD " $FFFE RESET COLD+2 IN ROM $FFFF " ************************** end of memory map ********************************